Frequency generators of the digitally settable type have been described, inter alia, in commonly owned U.S. Pat. Nos. 3,840,822, 3,875,524 and 4,191,930. As particularly disclosed in U.S. Pat. No. 3,840,822, for example, a main high-frequency oscillator can be provided with a phase-locking loop including a phase comparator or discriminator receiving on a first input a relatively low reference frequency and on a second input a matching feedback frequency derived from the output frequency of the main oscillator through a step-down circuit including several cascaded frequency dividers. The phase comparator works into a control input of the main oscillator through a nonlinear impedance path, specifically a shunt capacitor and a series resistor flanked by two antiparallel diodes, establishing a time constant which varies inversely with the output voltage of the phase comparator and thus sets a low limiting frequency for the correction of small phase differences. This is desirable, as explained in the prior patent referred to, in order to enable rapid coarse tuning of the main oscillator while minimizing the fluctuation of an output frequency due to the insertion or suppression of spikes in a train of such spikes emitted by that oscillator.
The large time constant of the filter network in its high-ohmic state has the drawback, however, of failing to compensate for phase differences resulting from frequency deviations smaller than the increments used for coarse tuning. Such a frequency instability or noise is objectionable in an oscillation generator which is to be finely tunable by small interpolation steps, especially by the subharmonic insertion or suppression of spikes as taught in the commonly owned prior patents.